Possible Problems Encountered in Power Supply Research and Development (1)
We use the most flyback power supply for low power. Why do we often choose 65K or 100K (near these frequency ranges) as the switching frequency? What are the constraints? Or under what circumstances can we increase the switching frequency? Or reduce the switching frequency?
Why do switching power supplies often choose a range around 65K or 100K as the switching frequency? Some people would say that IC manufacturers all produce such ICs. Of course, there are reasons for this. What will determine the switching frequency of each power supply?
You should think about the reasons from here. Some people will also say that EMC is difficult to deal with when the frequency is high. Generally speaking, this is true, but this is not inevitable. EMC is related to frequency, but it is not inevitable. Imagine that the switching frequency of our power supply has increased. What is the direct impact? Of course, the MOS switching loss increases because the number of switches per unit time increases. What will happen if the frequency is reduced? The switching loss has been reduced, but the energy provided by our energy storage device in a single cycle will increase, which will inevitably require a larger magnetic transformer and a larger energy storage inductor. Choosing around 65K to 100K is a more appropriate empirical compromise, and the power supply is made based on the rationalization of the compromise.
If under special circumstances, the input voltage is relatively low and the switching loss is already very small, do you not care about this switching loss? Then we can increase the switching frequency to reduce the size of the magnetic device.
Key point of this post: How to choose the switching frequency of a suitable IC? Why are the switching frequencies of mainstream ICs in such a range? What the switching frequency is related to is a common situation, not an attempt to get into the details of how many ICs have different frequencies. I would like to spread everyone’s thinking to pay attention to these issues!
The common situation I want to talk about here is what the switching frequency is related to, how to choose the appropriate switching frequency, why there are so many mainstream ICs and switching frequencies, please note that it is not certain, it is a common situation, so that novices can understand the general behavior , of course you can do whatever you want with the switching power supply, as long as it can be used reasonably.
1. How do you know that 65 or 100KHZ is generally selected as the switching frequency of the switching power supply? (Researching common mainstream ICs from large manufacturers, there will be more of these two, of course there are some around here, and some have adjustable switching frequencies)
2. How did you find out at work that the switching frequency of the switching power supply does indeed work at 65KHZ or 100KHZ. (From a design perspective, this range is generally used for power supplies)
3. Are there two or more pictures showing the frequency of testing 65KHZ100KHZ? (More than two pictures, meaningless)
4. Do you know that the switching power supply can work at 1.5HZ. (Do you think it is necessary to talk like this? There is nothing wrong with the work. If you are proficient in it, remember to do it in a technical way. Then can you talk about why common power supplies do not work at 1.5HZ? This is meaningful. It is completely meaningless for you to make a 1.5HZ power supply)
Reminder: As technicians, remember to be very careful. We are not a school research school. We need to combine theory with practice, and the products we make are meaningful products!
Why do we often design the switching frequency in the second zone in LLC? Why not District 1 and District 3? What are the constraints? Or what will be the consequences if zone 1 and zone 3 are selected as the switching frequency?
The principle of LLC is to use the inductive load to increase the inductive reactance as the switching frequency increases to adjust the output voltage, which is PFM modulation. Moreover, the MOS tube turn-on loss ZVS is smaller than ZCS, and the first area is the capacitive load area, which is naturally undesirable. Then in the third zone, the switching frequency is greater than the resonant frequency. This is still the inductive load zone. It stands to reason that there is no problem with MOS achieving ZVS, and it is true. But we cannot ignore the secondary output diode turning off. That is to say, when the primary side MOS tube is turned off, the resonant current does not decrease to be equal to the excitation current, thus achieving soft turn-off of the secondary side rectifier diode. This is why we usually don’t choose zone three either.
We can't just design based on previous experience, but we must know that there is an inevitable reason for designing this way!
What will happen when our flyback duty cycle is greater than 50%? What are the good aspects? What are the bad aspects?
What does it mean when the duty cycle of flyback is greater than 50%, and what factors are affected by the duty cycle? First: If the duty cycle is designed to be too large, the first thing it will bring is an increase in the turns ratio, and the stress on the main MOS tube will inevitably increase. Generally, MOS tubes below 600V or 650V are selected for flyback due to cost considerations. It will be unbearable if the duty cycle is too large.
Second point: It is very important that many people know that slope compensation is needed, otherwise the loop will oscillate. However, this is also conditional. The generation of the right plane zero point needs to work in CCM mode. If the design is in DCM mode, this problem will not exist. This is one of the reasons why low power is designed in DCM mode. Of course, we can also overcome this problem if we design loop compensation well enough.
Of course, under special circumstances, the duty cycle needs to be designed to be greater than 50%. The energy transferred per unit period increases, and the switching frequency can be reduced to achieve the purpose of improving efficiency. If the flyback is to increase efficiency, this method can be considered .
If a flyback power supply wants to achieve a certain level of efficiency, what aspects should we start with? Quasi-resonant? Synchronous rectification?
One of the major disadvantages of flyback is efficiency. What are some ways to improve efficiency? It is inevitable to reduce losses. The loss points include switching tubes, transformers, and output rectifiers. These are the three main parts.
As for switching tubes, we know that flyback is mainly a hard switch with PWM modulation, and switching loss is a major difficulty for us. Fortunately, the emergence of soft switching has given us hope. The flyback cannot achieve full resonance like LLC, so it can only develop towards quasi-resonance (partial time resonance). There are many such ICs available. Our company mostly uses NCP1207. After the MOS tube is turned off, Before the next turn-on, pin 1 detects that the VCC voltage crosses zero, and then turns on the next cycle after a set time.
How to minimize the loss of the transformer will be involved in the subsequent issues of a perfectly used transformer.
When synchronous rectification generally outputs large current, the loss of the secondary rectifier diode will still be large even if Schottky is used. At this time, synchronous rectification MOS is used to replace the Schottky diode. Some people will say that it is better to use LLC or forward because of the high cost. Of course, there is no best, only more suitable.
How is the conduction of power formed? What are the pathways of transmission? Commonly used means? What affects the radiation of the power supply? How to make high-power EMC.
The power conduction measurement method is to receive high-frequency interference from the internal power supply (generally 150K to 30M) through the input ports L, N, and PE.
To solve the problem of conduction, we must figure out how to reduce the interference received by the port.
As shown in the figure: There are generally two modes: L, N differential mode components, and common mode components through the PE ground loop. Some frequencies are differential common mode.
Through filtering: Generally, a secondary common mode is used with a Y capacitor to filter out. The method chosen is also very important, and the board layout also has a great impact. Generally, a low U inductor is placed close to the port, preferably made of nickel-zinc material, specifically for high frequencies. The winding method uses double wire winding to reduce differential mode components. The latter stage is generally placed with a larger inductance, around 4MH to 10MH, which is just an empirical value and needs to be matched with a Y capacitor. The X capacitor filtering differential mode also needs to be close to the port, usually placed in the middle of the secondary common mode. When placing Y capacitors, the traces need to be thicker when laying out the capacitors, and cannot be plugged in externally, otherwise the effect will be very poor. (These are just input filtering networks to make a fuss about)
Of course, we can also start from the source. Conduction is the result of radiation coupling into the line. Weakening the switch radiation can also bring benefits to conduction. Several places that affect radiation generally include MOS tube turn-on speed, rectifier tube turn-on and turn-off, transformer, and PFC inductor, etc. The design of these circuits requires compromises with other aspects that will not be detailed.
Some experience tips: For high-power EMC, it is generally necessary to add shielding, which will have an immediate effect. Generally, there are several choices for shielding parts:
First: Shielding between the input EMI circuit and the switch tube has a great effect on EMC. This method is generally very effective in many cases where filters are ineffective.
Second: The primary and secondary shielding of the transformer. Generally, if there is space in the design of the transformer, it is best to add shielding.
Third: The position of the radiator can serve as a good shield. Reasonable layout and utilization, and the choice of radiator grounding are also very important.
Fourth: To determine the location of the radiation source, there are generally several simple methods, which may not be completely accurate. You can refer to this. If the input wire sleeve magnetic ring is good for EMC, it is usually a primary MOS tube. If the output wire sleeve magnetic ring is good for EMC, If effective, it is usually the secondary output rectifier tube, especially for high frequencies greater than 100M. You can consider adding a capacitor or common mode inductor to the output.
Of course, there are many other detailed techniques, especially in the layout loop, which will be explained separately for LAYOUT later.
What factors should we consider when choosing a topology? What are the usage environments and advantages and disadvantages of various topologies?
I don’t know what everyone will think of in the first step of designing a power supply? That’s what I think. Carefully study the customer’s technical specification requirements, convert them into specifications for the power supply, and communicate the indicators with the customer. Different indicators mean design difficulty and cost, as well. It has a great impact on the question I asked. When choosing a topology, we consider it based on our power supply indicators and cost. What are the characteristics of the commonly used topologies?
Here we mainly talk about the isolated type. The non-isolated type has limited applications and is of course the lowest cost.
Features of flyback: Suitable for less than 150W, the theory says, but in reality it is rarely used for greater than 75W, not to mention very special circumstances. Flyback is somewhat low-cost and easy to debug (compared to half-bridge and full-bridge). It is mainly one-way excitation of the magnetic core. Its power is limited and its efficiency is not high. It is mainly due to hard switching, large leakage inductance and other reasons. The efficiency in the full voltage range (85V-264V) is generally below 80%, and it is easy to reach 80% with a single voltage.
Forward characteristics: The power is moderate, and it can be used for small and medium power. The power is generally below 200W. Of course, it can be used for high power, but it is not often done. The reason is that forward excitation and flyback excitation are the same in one direction, and the volume of the magnetic core required for high power is large. , of course, there are also two transformers connected in series and parallel. Please note that we only talk about the general situation and do not mislead newcomers. Forward excitation has some advantages, the cost is moderate, and of course it is higher than flyback. It has the advantage of higher efficiency than flyback. In particular, active clamp is used for primary side absorption to reuse the leakage inductance energy.
Half-bridge: Currently popular is the LLC resonant half-bridge, which is a small, medium and high power all-in-one type. (Generally greater than 100W and less than 3KW). The characteristic cost is higher than that of flyback forward, because one more MOS tube (bidirectional excitation) and one rectifier are used, the control IC is also expensive, and the loop design is complicated (an op amp is generally used, especially a current loop). Advantages: It uses soft switching, good EMC, extremely high efficiency, higher than forward. I have made a 960W LLC, and the efficiency can reach more than 96% (full voltage) (of course, PFC uses a bridgeless method). I don’t recommend other half-bridges, at least I won’t use them. The older asymmetric bridges are difficult to achieve soft switching. LLCs were mostly used before they matured, but are rarely used now. At least Emerson and other large companies are leaning towards LLCs. It's generally not wrong to follow the mainstream.
Full bridge: generally used above 2KW, the first phase-shifted full bridge, features, bidirectional excitation, MOS tube stress is small, less than half the stress of LLC, high power, especially when the input voltage is high, generally uses a phase-shifted full bridge, the input voltage Low Use LLC. The cost is particularly high, using 2 more MOS than LLC. This is not the first priority. The main reason is that the driver is complex and the driving capabilities of ordinary ICs cannot be reached. The driver must be amplified and driven by an isolation transformer. This is another aspect of high cost.
Push-pull: used in high-power applications, especially high-power applications with low input voltage. It has high voltage stress, but of course small current stress. Whether to use full bridge or push-pull for high power generally depends on the input voltage. The transformer has one more winding, which requires high tube stress. Of course, the often mentioned magnetic bias also needs to be overcome. I have never used this before. It does not involve electric power, so it is difficult to use it.
When considering power costs, where do we start?
When designing a power supply, cost evaluation is essential. Currently, customers keep the cost of power supplies very low. All major competitors are engaging in price wars. Everyone can make a power supply. It depends on who can make it cheaper to win the order. , where to start is beneficial to our costs:
First: technical indicators. The higher the technical indicators of the power supply, the higher the cost. If the cost of your power supply is high, then you can use your performance indicators as a selling point. With more performance requirements and more circuits, the cost will naturally be higher. It is also the capital for talking with customers.
Second: Material procurement costs, why do large power supply companies have high profits? It's just that they have a superior purchasing platform, large purchasing volume, low material costs, and of course lower costs. If purchasing is not considered, as an engineer, you must figure out the corresponding costs of different materials. For example, if you can use SMDs, you can use less plug-ins. (For example, plug-in resistors are more expensive than SMDs.) If you can use domestically produced materials, you will not need Taiwanese investment. If you can use Taiwanese investment, you will not need them. Japanese, the price difference here is huge. (For example, the price of Japanese capacitors is several times higher than that of domestic capacitors!!! Of course, the quality is also different;)
Third: Important components that affect cost: transformers, inductors, MOS tubes, capacitors, optocouplers, diodes and other semiconductor devices, ICs, etc. The price of the transformers wound by different transformer manufacturers varies greatly, as long as the stress of the MOS tube and thermal resistance are sufficient, the cost of the IC solution, etc.
Other aspects lead to cost issues: the device heat sink is of the right size, and any more is a waste of money. In PCB layout, if you can use a single panel to turn into a double panel, it is a waste of money. For PCB layout technology, choose a reasonable process with low processing costs and high production efficiency.
Power supply loop design, which parts of the power supply affect the power supply loop? What indicators determine a good loop?
The loop design of power supply has always been a difficult point. Why do we say this? Because there are too many main influencing factors, it is difficult to achieve accurate theoretical calculations. The simulation is also based on an idealized model. Here we only talk about some influencing factors on loop design. Understand the loop and how to perform loop compensation from a qualitative perspective.
When the loop is based on input and output fluctuations, feedback is required, and the loop accordingly informs the control IC to adjust to maintain the stability of the output. Power supply loops are generally series negative feedback, some are voltage series negative feedback (in CC mode), and some are current series negative feedback (in CV mode).
So what places will affect the loop? Zeros and poles in a circuit. A zero will generally cause a gain increase, causing a 90 degree phase shift (a right half plane zero will cause a -90 degree phase shift). Poles generally cause gain reduction, causing a -90 degree phase shift, and left half-plane poles can cause system oscillations. Therefore, we need to use zero-point and pole compensation methods to reasonably control our loop. For the low-frequency part, zero point compensation is generally introduced in order to meet sufficient gain. For high-frequency interference, pole compensation is generally introduced to offset and reduce high-frequency interference.
The principles of loop stability are: 1. At the crossover frequency (that is, the frequency when the gain is zero dB), the phase margin of the system is greater than 45 degrees.
2. When the phase reaches -180 degrees, the gain margin is greater than -12dB. 3. Avoid entering the crossover frequency too quickly. The slope of the curve near the crossover frequency is -1.
For general flyback circuits: 1. There is an output filter capacitor that generates zero points: it can increase the loop gain. (Generally around mid-frequency 4K, which is good for gain and does not require compensation)
2. If working in CCM mode, the right half-plane zero point will also be generated. In the high frequency band, pole compensation can be used. This is generally difficult to compensate for, so try to avoid it. Make the crossover frequency less than the right half-plane zero frequency (about 15K, which will change with the load). Selecting 3. The load will produce low-frequency poles. Use low frequency zero point to compensate. 4. The LC filter will produce low-frequency poles and requires zero point compensation. You should know in your mind which zeros and poles are pros and cons, and compensate accordingly.
The compensation circuit is relatively simple for the power supply loop. Generally, type 2 compensation is used for the op amp, and some use type 3 compensation, which is rarely used.
What are the forms of soft switching for various topologies? How is soft switching implemented?
Soft switching is currently used frequently. Firstly, it can improve sub-efficiency, and secondly, it can benefit EMC. Many topologies have begun to use soft switching. Even flyback has introduced quasi-resonance to achieve soft switching in order to achieve high efficiency. This has been discussed in the previous question. LLC's soft switch also mentioned the implementation conditions in the previous question, but the specific implementation process was not detailed. Here I will share my understanding of soft switching.
Implementation conditions and process: Using soft switching requires two elements, one is C and the other is L to achieve resonance (of course, it can also be in the form of multiple resonances). The resonance will generate a sine wave, and the sine wave can achieve zero crossing. If it is series resonance, it belongs to voltage resonance, and parallel resonance belongs to current resonance.
Secondly, the difference between soft switching and hard switching is that the voltage and current overlap during the hard switching process. In soft switching, either the current is zero (ZCS) or the voltage is zero (ZVS). The soft switching of MOS tubes can use junction capacitance or shunt capacitance, and then the series inductor can achieve series ZVS, such as quasi-resonant flyback, active clamp absorption circuit, and move to full-bridge soft switching. There is also LC parallel ZCS, but it is rarely used because the loss of MOS tube ZVS is less than ZCS. LLC is a series-parallel type, but we use the ZVS zone. (When the resonant current crosses zero in the dead zone, before the upper tube is softly turned on, the junction capacitor of the lower tube is charged first, and the upper tube is softly turned on)